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In the figure, the circuit has two inputs and one output. Whenever the write enable
input is on (i.e., a positive voltage), the circuit sets the output value equal to the input
(zero or one). Whenever the write enable input is off (i.e., zero volts), the circuit ignores
the input and keeps the output at the last setting. Thus, to write a value, the
hardware places the desired value on the input, turns on the write enable line and then
turns it off again. While the enable line is on, the circuit records the input value. When
the enable line is turned off, the circuit holds the output value.
Although it performs at high speed, SRAM has a significant disadvantage: power
consumption and heat. The miniature circuit contains many transistors that operate continuously.
Each transistor consumes a small amount of power and generates heat.
The alternative to Static RAM, which is known as Dynamic RAM (DRAM‡), consumes
less power. However, the internal working of Dynamic RAM is surprising and
can be confusing. At the lowest level, to store information, DRAM uses a circuit that
acts like a capacitor, a device that stores electrical charge. When a value is written to
DRAM, the hardware charges or discharges the capacitor to reflect the digital value.
Later, when a value is read from DRAM, the hardware examines the charge on the
capacitor and generates the appropriate digital value.
The conceptual difficulty surrounding DRAM arises from the way a capacitor
works: because physical systems are imperfect, a capacitor gradually loses its charge.
In essence, a DRAM chip is an imperfect memory device — if a value is left long
enough, the charge dissipates and the bit becomes zero. More important, DRAM loses
its charge in a short time (e.g., in some cases, under a second).
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