EXERCISES
14.1 A hardware architect asks you to choose between a single, thirty-two bit bus design that
multiplexes both data and address information across the bus, or two sixteen-bit buses,
one used to send address information and one used to send data. Which design do you
choose? Why?
14.2 If a bus has can transfer 64 bits in each cycle and runs at a rate of 66 MHz, what is the
bus throughput measured in megabytes per second?
14.3 How many simultaneous transfers can occur over a crossbar switching fabric of N inputs
and M outputs?