Most PCs are held back not by the speed of their main processor, but b translation - Most PCs are held back not by the speed of their main processor, but b Persian how to say

Most PCs are held back not by the s

Most PCs are held back not by the speed of their main processor, but by the time it takes to move data in and out of memory. One of the most important techniques for getting around this bottleneck is the memory cache.
The idea is to use a small number of very fast memory chips as a buffer or cache between main memory and the processor. Whenever the processor needs to read data it looks in this cache area first. If it finds the data in the cache then this counts as a 'cache hit' and the processor need not go through the more laborious process of reading data from the main memory. Only if the data is not in the cache does it need to access main memory, but in the process it copies whatever it finds into the cache so that it is there ready for the next time it is needed. The whole process is controlled by a group of logic circuits called the cache controller.
One of the cache controller's main jobs is to look after 'cache coherency' which means ensuring that any changes written to main memory are reflected within the cache and vice versa. There are several techniques for achieving this, the most obvious being for the processor to write directly to both the cache and main memory at the same time. This is known as a 'write-through' cache and is the safest solution, but also the slowest.
The main alternative is the 'write-back' cache which allows the processor to write changes only to the cache and not to main memory. Cache entries that have changed are flagged as 'dirty' telling the cache controller to write their contents back to main memory before using the space to cache new data. A write-back cache speeds up the write process, but does require a more intelligent cache controller.
Most cache controllers move a 'line' of data rather than just a single item each time they need to transfer data between main memory and the cache. This tends to improve the chance of a cache hit as most programs spend their time stepping through instructions stored sequentially in memory, rather than jumping about from one area to another. The amount of data transferred each time is known as the 'line size'.
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Most PCs are held back not by the speed of their main processor, but by the time it takes to move data in and out of memory. One of the most important techniques for getting around this bottleneck is the memory cache.The idea is to use a small number of very fast memory chips as a buffer or cache between main memory and the processor. Whenever the processor needs to read data it looks in this cache area first. If it finds the data in the cache then this counts as a 'cache hit' and the processor need not go through the more laborious process of reading data from the main memory. Only if the data is not in the cache does it need to access main memory, but in the process it copies whatever it finds into the cache so that it is there ready for the next time it is needed. The whole process is controlled by a group of logic circuits called the cache controller.One of the cache controller's main jobs is to look after 'cache coherency' which means ensuring that any changes written to main memory are reflected within the cache and vice versa. There are several techniques for achieving this, the most obvious being for the processor to write directly to both the cache and main memory at the same time. This is known as a 'write-through' cache and is the safest solution, but also the slowest.The main alternative is the 'write-back' cache which allows the processor to write changes only to the cache and not to main memory. Cache entries that have changed are flagged as 'dirty' telling the cache controller to write their contents back to main memory before using the space to cache new data. A write-back cache speeds up the write process, but does require a more intelligent cache controller.Most cache controllers move a 'line' of data rather than just a single item each time they need to transfer data between main memory and the cache. This tends to improve the chance of a cache hit as most programs spend their time stepping through instructions stored sequentially in memory, rather than jumping about from one area to another. The amount of data transferred each time is known as the 'line size'.
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اکثر رایانه های شخصی به عقب برگزار شده توسط سرعت پردازنده اصلی خود را، اما در زمان آن طول می کشد به حرکت داده در داخل و خارج از حافظه است. یکی از روش های مهم برای گرفتن در اطراف این تنگنا حافظه کش است.
ایده این است که استفاده از تعداد کمی از تراشه های حافظه بسیار سریع به عنوان یک بافر و یا حافظه نهان بین حافظه اصلی و پردازنده. هر زمان که پردازنده نیاز به به خواندن داده ها در این زمینه به نظر می رسد برای اولین بار کش. اگر آن را پیدا داده ها در حافظه پنهان پس از آن این تعداد به عنوان یک برخورد کش و پردازنده نیاز از طریق فرایند دشوار خواندن داده ها از حافظه اصلی نه. تنها در صورتی که داده ها در حافظه پنهان نمی کند آن نیاز به دسترسی به حافظه اصلی است، اما در فرایند کپی آن را هر چه آن را به کش می یابد به طوری که آن وجود دارد آماده برای زمان بعد از آن مورد نیاز است. کل فرآیند توسط یک گروه از مدارهای منطقی به نام کنترل کننده حافظه کنترل می شود.
یکی از وظایف اصلی کنترل کش است بعد از 'کش همسان "که به معنی تضمین این که هر گونه تغییر نوشته شده به حافظه اصلی در داخل کش و بالعکس منعکس شده به نگاه. چندین تکنیک برای دستیابی به این امر، واضح ترین برای پردازنده که ارسال به طور مستقیم به هر دو کش و حافظه اصلی در همان زمان وجود دارد. این را به عنوان یک "ارسال از طریق 'کش شناخته شده است و امن ترین راه حل، بلکه کمترین.
جایگزین اصلی از' نوشتن پشت 'کش که اجازه می دهد تا پردازنده به ارسال تغییرات تنها به کش و نه به حافظه اصلی است. حافظه داخلی که تغییر کرده اند به عنوان "کثیف" گفتن کنترل کننده حافظه به ارسال مطالب خود به حافظه اصلی قبل از استفاده از فضای cache کردن داده های جدید پرچم. کش نوشتن پشت سرعت بخشیدن به روند نوشتن، اما نیاز به یک کنترل کننده حافظه و آگاهی بیشتر.
اغلب کنترل کش حرکت یک "خط" داده و نه تنها یک آیتم در هر زمان آنها نیاز به انتقال داده ها بین حافظه اصلی و حافظه نهان. این تمایل به بهبود شانس یک ضربه کش به عنوان بسیاری از برنامه وقت خود را صرف پله از طریق دستورالعمل پی در پی ذخیره شده در حافظه، به جای پریدن در مورد از یک منطقه به دیگری. مقدار داده هر زمان منتقل شده است به عنوان اندازه خط شناخته شده است.
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