Every computer contains an internal clock that regulates how quickly instructions
can be executed. The clock also synchronizes all of the components in the system.
As the clock ticks, it sets the pace for everything that happens in the system,
much like a metronome or a symphony conductor. The CPU uses this clock to
regulate its progress, checking the otherwise unpredictable speed of the digital
logic gates. The CPU requires a fixed number of clock ticks to execute each
instruction. Therefore, instruction performance is often measured in clock
cycles—the time between clock ticks—instead of seconds. The clock frequency
(sometimes called the clock rate or clock speed) is measured in MHz, as we saw
in Chapter 1, where 1MHz is equal to 1 million cycles per second (so 1 hertz is 1
cycle per second). The clock cycle time (or clock period) is simply the reciprocal
of the clock frequency. For example, an 800MHz machine has a clock cycle time
of 1/800,000,000 or 1.25ns. If a machine has a 2ns cycle time, then it is a
500MHz machine.
Most machines are synchronous: there is a master clock signal, which ticks
(changing from 0 to 1 to 0 and so on) at regular intervals. Registers must wait for
the clock to tick before new data can be loaded. It seems reasonable to assume
that if we speed up the clock, the machine will run faster. However, there are limits
on how short we can make the clock cycles. When the clock ticks and new
data is loaded into the registers, the register outputs are likely to change. These
changed output values must propagate through all the circuits in the machine
until they reach the input of the next set of registers, where they are stored. The
clock cycle must be long enough to allow these changes to reach the next set of
registers. If the clock cycle is too short, we could end up with some values not
reaching the registers. This would result in an inconsistent state in our machine,
which is definitely something we must avoid. Therefore, the minimum clock
cycle time must be at least as great as the maximum propagation delay of the circuit,
from each set of register outputs to register inputs. What if we “shorten” the
distance between registers to shorten the propagation delay? We could do this by
adding registers between the output registers and the corresponding input registers.
But recall that registers cannot change values until the clock ticks, so we
have, in effect, increased the number of clock cycles. For example, an instruction
that would require 2 clock cycles might now require three or four (or more,
depending on where we locate the additional registers).
Most machine instructions require 1 or 2 clock cycles, but some can take 35
or more. We present the following formula to relate seconds to cycles: