How wide should a bus be? Recall from Chapter 13 that parallel interfaces
represent a compromise: although increasing the width increases the throughput, greater
width also takes more space and requires more electronic components in the attached
devices. Thus, an architect chooses a bus width as a compromise between space, cost
of electronics, and performance.
One technique stands out as especially helpful in reducing the number of lines in a
bus: multiplexing. Multiplexing can be used in two ways: data multiplexing and address
and data multiplexing.
Data Multiplexing. We have already seen how data multiplexing works. In
essence, when a device attached to a bus has a large amount of data to transfer, the device
divides the data into blocks that are exactly as large as the bus is wide. The device
then uses the bus repeatedly, by sending one block at a time.
Address And Data Multiplexing. The motivation for multiplexing addresses and
data is the same as the motivation for data multiplexing: a reduced number of lines. To
understand how it works, consider the steps in Figure 14.5 carefully. In the case of a
fetch operation, the address lines and data lines are never used at the same time (i.e., in
the same step). Thus, an architect can use the same lines to send an address and receive
data. Similarly, a store operation can use a single set of lines to communicate both address
and data information provided the hardware first sends the address, and then sends
the data